st/mesa: don't use address register for constant-indexed ir_binop_ubo_load
authorBrian Paul <brianp@vmware.com>
Tue, 1 Jul 2014 13:57:43 +0000 (07:57 -0600)
committerBrian Paul <brianp@vmware.com>
Tue, 1 Jul 2014 15:42:44 +0000 (09:42 -0600)
commit01bf8bb87565ed3677e43c6b6deeb90378d88647
tree1ee1da932ddc40fbd0c6a05d501d9df8b001a566
parentdfca35f8078e79e8c5ba520dae4a2741b96c9ed9
st/mesa: don't use address register for constant-indexed ir_binop_ubo_load

Before, we were always using the address register and indirect addressing
to index into a UBO constant buffer.  With this change we only do that
when necessary.

Using the piglit bin/arb_uniform_buffer_object-rendering test as an
example:

Shader code:
  uniform ub_rot {float rotation; };
  ...
  m[1][1] = cos(rotation);

Before:
  IMM[1] INT32 {0, 1, 0, 0}
  1: UARL ADDR[0].x, IMM[1].xxxx
  2: MOV TEMP[0].x, CONST[3][ADDR[0].x].xxxx
  3: COS TEMP[1].x, TEMP[0].xxxx

After:
  0: COS TEMP[0].x, CONST[3][0].xxxx

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
src/mesa/state_tracker/st_glsl_to_tgsi.cpp