soc/interconnect: add stream_sim
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Fri, 13 Nov 2015 23:43:49 +0000 (00:43 +0100)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Fri, 13 Nov 2015 23:43:49 +0000 (00:43 +0100)
commit032f5a962034fb6c1c1b30e7292263fad49e995f
tree955e078147efbb8de73778a811ad90f8cf5dd23b
parentba959c832d09a22272c96d68df9078a19258e495
soc/interconnect: add stream_sim
litex/soc/interconnect/stream_sim.py [new file with mode: 0644]
litex/soc/interconnect/wishbonebridge.py