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(parent: f1840c9) | patch
arch-riscv: Add float registers in copyRegs
authorIan Jiang <ianjiang.ict@gmail.com>
Wed, 19 Aug 2020 08:19:33 +0000 (16:19 +0800)
committerIan Jiang <ianjiang.ict@gmail.com>
Fri, 21 Aug 2020 00:51:26 +0000 (00:51 +0000)
commit03976aa5827a36ddec377b1f9767eb023796956f
tree524f3656938d6d78f00ce2a734815ffbe0e54ddftree
parentf1840c9951408b25340ad6f383143f1018003d23commit | diff
arch-riscv: Add float registers in copyRegs

The origin copyRegs() does not include float registers.
This patch fixes the problem.

Change-Id: If4ad04b1eda6035486197879ff3e04ff32dd87bb
Signed-off-by: Ian Jiang <ianjiang.ict@gmail.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32934
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/riscv/utility.hh diff | blob | history