Fixed memory leak.
authorMaciej Kurc <mkurc@antmicro.com>
Wed, 5 Jun 2019 08:42:43 +0000 (10:42 +0200)
committerMaciej Kurc <mkurc@antmicro.com>
Wed, 5 Jun 2019 08:42:43 +0000 (10:42 +0200)
commit03e0d3a17cf27858d16e0169614b6575c7dac538
treef07180e7fed3e43eb69f33a81622b7554449b136
parentb79bd5b3ca086718e308c75cbece0b07bbe48733
Fixed memory leak.

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
frontends/verilog/verilog_parser.y