nvc0: add MP counters variants for GF100/GF110
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Tue, 13 Oct 2015 23:15:43 +0000 (01:15 +0200)
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>
Fri, 16 Oct 2015 19:57:44 +0000 (21:57 +0200)
commit0461260d772ed91bec7cd36727c82ca4e6d71275
treeba9b0dd7d52eb880020358c01d442593173663ce
parentec5001d25b281455869149bff5fa9d8c497b0cd4
nvc0: add MP counters variants for GF100/GF110

GF100 and GF110 chipsets are compute capability 2.0, while the other
Fermi chipsets are compute capability 2.1. That's why, some MP counters
are different between these chipsets and we need to handle variants.

Signed-off-by: Samuel Pitoiet <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.h