integration/soc: add FPGA device and System clock to logs.
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Tue, 10 Mar 2020 10:10:23 +0000 (11:10 +0100)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Tue, 10 Mar 2020 10:10:23 +0000 (11:10 +0100)
commit04b8a912558033afc51dc673d85ade339c7d3786
treed2815bdc10c63de7f3c3da61c85d8ae7dd71d145
parent02cba41d644dbb9e4df53f5f2fd176e0bbbbbbbd
integration/soc: add FPGA device and System clock to logs.
litex/soc/integration/soc.py