radeon/llvm: Create a register class for the M0 register
authorTom Stellard <thomas.stellard@amd.com>
Wed, 29 Aug 2012 14:33:58 +0000 (10:33 -0400)
committerTom Stellard <thomas.stellard@amd.com>
Wed, 29 Aug 2012 19:52:10 +0000 (15:52 -0400)
commit05113fd2662eeb0d17fd1074001b7405eeeca43c
tree8f5701f3e526c1922a2f424e04b941063880425d
parent733c28a0d95c1da87b14ef893f8a59b1f940322a
radeon/llvm: Create a register class for the M0 register

The Common Subexpression Elimination pass will not operate on
instructions with physical register defs, so we end up with
several redundant copies to M0 when using interpolation.

Adding a register class that only contains the M0 register allows
use to use a virtual register to represent M0, and makes it possible
for the Common Subexpression Elimination pass to remove the extra
copies.
src/gallium/drivers/radeon/SIGenRegisterInfo.pl
src/gallium/drivers/radeon/SIISelLowering.cpp
src/gallium/drivers/radeon/SIISelLowering.h
src/gallium/drivers/radeon/SIInstrInfo.td
src/gallium/drivers/radeon/SIInstructions.td