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(parent: d2d8c2b) | patch
back.pysim: check for a clock being added twice.
authorwhitequark <whitequark@whitequark.org>
Tue, 11 Jun 2019 03:54:22 +0000 (03:54 +0000)
committerwhitequark <whitequark@whitequark.org>
Tue, 11 Jun 2019 03:54:22 +0000 (03:54 +0000)
commit066dd799e8b443172f2e90f0259f1057e21d2713
tree19fcbfc6b01c5d52a7c4bf4ec5797a54c33fdc02tree
parentd2d8c2b8bf1bfdba2321615947a829c59ae3929ccommit | diff
back.pysim: check for a clock being added twice.

This commit adds a best-effort error for a common mistake of adding
a clock driving the same domain twice, such as a result of
a copy-paste error.

Fixes #27.
nmigen/back/pysim.py diff | blob | history
nmigen/test/test_sim.py diff | blob | history