higher bits need to be checked for overflow not lower
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 29 Apr 2022 09:47:03 +0000 (10:47 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 29 Apr 2022 09:47:03 +0000 (10:47 +0100)
commit073981b64b750059e784f82fd35aa809eb2e5a69
tree215d058ce516bbd3a8512bdcb675bc910acda486
parentb0fbc4a9df0e5c174f2be6073f93952c2e0058b0
higher bits need to be checked for overflow not lower
after swapping RC and RA, RC is now in the higher bits of divmod2du
openpower/isa/svfixedarith.mdwn