back.pysim: robustly retrieve vcd names for clk/rst when writing gtkw.
authorwhitequark <cz@m-labs.hk>
Fri, 14 Dec 2018 10:57:13 +0000 (10:57 +0000)
committerwhitequark <cz@m-labs.hk>
Fri, 14 Dec 2018 10:57:13 +0000 (10:57 +0000)
commit07814c0fee5f01c42d7081765d920de05cf3455b
tree97793b9a2064bdc0be1ad76d74f02248ddf3b87e
parent5e60b7bca74f3de16591e7bb2e7ea329bf7b7d8f
back.pysim: robustly retrieve vcd names for clk/rst when writing gtkw.
nmigen/back/pysim.py