RISC-V: Emit "i" suffix for instructions with immediate operands

RISC-V: Emit "i" suffix for instructions with immediate operands

This changes makes GCC asm output use instruction names that are
consistent with the RISC-V ISA manual.  The assembler accepts
immediate-operand instructions without the "i" suffix, so this all
worked before, it's just a bit cleaner to match the ISA manual more
closely.

gcc/ChangeLog

2017-10-03  Michael Clark  <michaeljclark@mac.com>

        * config/riscv/riscv.c (riscv_print_operand): Add a 'i' format.
        config/riscv/riscv.md (addsi3): Use 'i' for immediates.
        (adddi3): Likewise.
        (*addsi3_extended): Likewise.
        (*addsi3_extended2): Likewise.
        (<optab>si3): Likewise.
        (<optab>di3): Likewise.
        (<optab><mode>3): Likewise.
        (<*optabe>si3_internal): Likewise.
        (zero_extendqi<SUPERQI:mode>2): Likewise.
        (*add<mode>hi3): Likewise.
        (*xor<mode>hi3): Likewise.
        (<optab>di3): Likewise.
        (*<optab>si3_extend): Likewise.
        (*sge<u>_<X:mode><GPR:mode>): Likewise.
        (*slt<u>_<X:mode><GPR:mode>): Likewise.
        (*sle<u>_<X:mode><GPR:mode>): Likewise.

From-SVN: r254418