aco: fix nir_op_frexp_exp with 16-bit floats and negative exponents
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Tue, 14 Apr 2020 07:42:48 +0000 (09:42 +0200)
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 15 Apr 2020 08:12:44 +0000 (10:12 +0200)
commit08a396033be1d7ceddf48da0563a7e4d2cb64429
tree4494456822a6c6c1b96e93f30ad80071da513df7
parent9bf8e923863230914f6bf2a4abcf257cb8778ee7
aco: fix nir_op_frexp_exp with 16-bit floats and negative exponents

v_frexp_exp_i16_f16 returns the two's complement for negative
exponents. For example, with 0.333252 it returns 0.666504 for
the mantissa and 65535 for the exponent (-1 in decimal).

RADV/LLVM and AMDVLK do a v_bfe_i32 and AMDGPU-PRO uses SDWA with
the sign extension bit set. The latter is probably what we want to
do in long term but for now RA doesn't support changing non-SDWA
instructions to SDWA if useful/needed.

Fixes dEQP-VK.glsl.builtin.precision_fp16_storage16b.frexp.compute.*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4546>
src/amd/compiler/aco_instruction_selection.cpp