Make core testbenches recognized by VUnit
authorLars Asplund <lars.anders.asplund@gmail.com>
Mon, 7 Jun 2021 20:34:00 +0000 (22:34 +0200)
committerLars Asplund <lars.anders.asplund@gmail.com>
Wed, 9 Jun 2021 16:00:53 +0000 (18:00 +0200)
commit08c0c4c1b41b3e7d18b9c3fa4a9bdfa42b5f491c
treecb83f784ee73a5d1e95a8588258087200719445b
parent41d57e614858457001bcef4fc03f1019f93ac9f6
Make core testbenches recognized by VUnit

This commit also removes the dependencies these testbenches have on VHPIDIRECT.
The use of VHPIDIRECT limits the number of available simulators for the project. Rather than using
foreign functions the testbenches can be implemented entirely in VHDL where equivalent functionality exists.
For these testbenches the VHPIDIRECT-based randomization functions were replaced with VHDL-based functions.

The testbenches recognized by VUnit can be executed in parallel threads for better simulation performance using
the -p option to the run.py script

Signed-off-by: Lars Asplund <lars.anders.asplund@gmail.com>
.github/workflows/test.yml
Makefile
countzero_tb.vhdl
divider_tb.vhdl
foreign_random.vhdl [new file with mode: 0644]
multiply_tb.vhdl
plru_tb.vhdl
random.vhdl
rotator_tb.vhdl
run.py