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(parent: 8f1a320) | patch
cxxrtl: disambiguate values/wires and their aliases in debug info.
authorwhitequark <whitequark@whitequark.org>
Wed, 10 Jun 2020 14:39:45 +0000 (14:39 +0000)
committerwhitequark <whitequark@whitequark.org>
Wed, 10 Jun 2020 14:39:45 +0000 (14:39 +0000)
commit0955a603c889e3ce86ca65cf59ec3ca5650c6517
treedc90291aed57d5109bdf520da26e603015bf45bftree
parent8f1a32064639fa17d67bda508df941c8846a0664commit | diff
cxxrtl: disambiguate values/wires and their aliases in debug info.

With this change, it is easier to see which signals carry state (only
wire<>s appear as `reg` in VCD files) and to construct a minimal
checkpoint (CXXRTL_WIRE debug items represent the canonical smallest
set of state required to fully reconstruct the simulation).
backends/cxxrtl/cxxrtl.h diff | blob | history
backends/cxxrtl/cxxrtl_backend.cc diff | blob | history
backends/cxxrtl/cxxrtl_capi.h diff | blob | history
backends/cxxrtl/cxxrtl_vcd.h diff | blob | history