compat: fix confusing naming for memory port address signal.
authorwhitequark <cz@m-labs.hk>
Sat, 22 Dec 2018 00:53:05 +0000 (00:53 +0000)
committerwhitequark <cz@m-labs.hk>
Sat, 22 Dec 2018 00:53:05 +0000 (00:53 +0000)
commit0989465cdfc8fa1ad059d436f913ed64c9d9a814
treec02237266b370e5542068690026656bddf6e985d
parenta1ebe2be4dce3c41b58051705ad9552dbf1991d6
compat: fix confusing naming for memory port address signal.
nmigen/compat/fhdl/specials.py