RISC-V: Add RV32E support.
authorKito Cheng <kito.cheng@gmail.com>
Fri, 18 May 2018 22:53:55 +0000 (22:53 +0000)
committerJim Wilson <wilson@gcc.gnu.org>
Fri, 18 May 2018 22:53:55 +0000 (15:53 -0700)
commit09baee1ab152afb0466c00ce87f0d681f2a50e21
tree099bc749227aa5e740a633ed64614b065584c3a2
parentdc2ebc998a679294a672ecb4f585d66c9f10f56e
RISC-V: Add RV32E support.

Kito Cheng <kito.cheng@gmail.com>
Monk Chiang  <sh.chiang04@gmail.com>

gcc/
* common/config/riscv/riscv-common.c (riscv_parse_arch_string):
Add support to parse rv32e*.  Clear MASK_RVE for rv32i and rv64i.
* config.gcc (riscv*-*-*): Add support for rv32e* and ilp32e.
* config/riscv/riscv-c.c (riscv_cpu_cpp_builtins): Define
__riscv_32e when TARGET_RVE.  Handle ABI_ILP32E as soft-float ABI.
* config/riscv/riscv-opts.h (riscv_abi_type): Add ABI_ILP32E.
* config/riscv/riscv.c (riscv_compute_frame_info): When TARGET_RVE,
compute save_libcall_adjustment properly.
(riscv_option_override): Call error if TARGET_RVE and not ABI_ILP32E.
(riscv_conditional_register_usage): Handle TARGET_RVE and ABI_ILP32E.
* config/riscv/riscv.h (UNITS_PER_FP_ARG): Handle ABI_ILP32E.
(STACK_BOUNDARY, ABI_STACK_BOUNDARY): Handle TARGET_RVE.
(GP_REG_LAST, MAX_ARGS_IN_REGISTERS): Likewise.
(ABI_SPEC): Handle mabi=ilp32e.
* config/riscv/riscv.opt (abi_type): Add ABI_ILP32E.
(RVE): Add RVE mask.
* doc/invoke.texi (RISC-V options) <-mabi>: Add ilp32e info.
<-march>: Add rv32e as an example.

gcc/testsuite/
* gcc.dg/stack-usage-1.c: Add support for rv32e.

libgcc/
* config/riscv/save-restore.S: Add support for rv32e.

Co-Authored-By: Jim Wilson <jimw@sifive.com>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>
From-SVN: r260384
13 files changed:
gcc/ChangeLog
gcc/common/config/riscv/riscv-common.c
gcc/config.gcc
gcc/config/riscv/riscv-c.c
gcc/config/riscv/riscv-opts.h
gcc/config/riscv/riscv.c
gcc/config/riscv/riscv.h
gcc/config/riscv/riscv.opt
gcc/doc/invoke.texi
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.dg/stack-usage-1.c
libgcc/ChangeLog
libgcc/config/riscv/save-restore.S