sim.pysim: use VCD aliases to reduce space and time overhead.
authorwhitequark <whitequark@whitequark.org>
Sat, 11 Jul 2020 12:25:31 +0000 (12:25 +0000)
committerwhitequark <whitequark@whitequark.org>
Sat, 11 Jul 2020 12:26:34 +0000 (12:26 +0000)
commit0a90aa1b1709fcfce48751c345b4b466ac09fc1e
treef10a2c7cf1dfea30f897229b27175a8941d6764c
parent30e2f91176edcd1c8766c2cb11f413b9c77936b9
sim.pysim: use VCD aliases to reduce space and time overhead.

On Minerva SoC, this reduces VCD file size by about 35%, and reduces
runtime overhead of writing VCDs by 10% or less.
nmigen/sim/pysim.py
setup.py