Add generation of logic cells to EDIF back-end runtest.py
authorClifford Wolf <clifford@clifford.at>
Sun, 19 Mar 2017 13:57:40 +0000 (14:57 +0100)
committerClifford Wolf <clifford@clifford.at>
Sun, 19 Mar 2017 13:57:40 +0000 (14:57 +0100)
commit0ac72e759d986149541ee6a90d185811e697c27b
treee09c92830eaaf403a746f53de40fb5d354ae72ca
parent850f8299a9374ae4b9caeca8b6cd888be7c0a406
Add generation of logic cells to EDIF back-end runtest.py
backends/edif/runtest.py