systemc: Implement signal based resets.
authorGabe Black <gabeblack@google.com>
Wed, 26 Sep 2018 10:20:09 +0000 (03:20 -0700)
committerGabe Black <gabeblack@google.com>
Tue, 16 Oct 2018 00:35:50 +0000 (00:35 +0000)
commit0cfce458003c377878aad3b15cf5fa2860a5f8e7
treef99966a70759fde8d40b8a2e95939a4f7c3b2412
parentf4ab64a588771391c2eebd9b1c8b089aa33cda67
systemc: Implement signal based resets.

The implementation is based on sc_event sensitivities.

Also of note is that the way reset works in the Accellera
implementation isn't consistent with the spec. That says that
wait(int n) is supposed to be equivalent to calling wait() n times,
assuming n is greater than 0.

Instead, Accellera stores that count and then doesn't wake up the
process until the count is 0, decrementing it otherwise.

That means that when the process is in reset, it won't actually reset
for those intermediate wait()s which it would if wait() was called
repeatedly. Also, oddly, when a reset becomes asserted, it will clear
the count to 0 explicitly. That may have been an attempt to make the
behavior of wait(int n) match the spec, but it doesn't handle cases
where the reset is already set when wait(int n) is called.

Change-Id: I92f8e9a128e6618af94dc048ce570a4436e17e4b
Reviewed-on: https://gem5-review.googlesource.com/c/13186
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
13 files changed:
src/systemc/core/event.cc
src/systemc/core/event.hh
src/systemc/core/port.cc
src/systemc/core/port.hh
src/systemc/core/process.cc
src/systemc/core/process.hh
src/systemc/core/sc_module.cc
src/systemc/core/sc_spawn.cc
src/systemc/core/scheduler.cc
src/systemc/core/scheduler.hh
src/systemc/core/sensitivity.cc
src/systemc/core/sensitivity.hh
src/systemc/ext/core/sc_spawn.hh