arch, arm: Effect of AT instructions on descriptor handling
authorAnouk Van Laer <anouk.vanlaer@arm.com>
Fri, 19 Oct 2018 10:19:08 +0000 (11:19 +0100)
committerAnouk Van Laer <anouk.vanlaer@arm.com>
Mon, 5 Nov 2018 09:56:17 +0000 (09:56 +0000)
commit0e9da43cb63cb6876da608bef980d763d58e4381
tree95e4694e4ed812ba1da1025d9a997b004c4624ab
parentfd294813c443fc1e80ed77a76b172d7103cb3fbf
arch, arm: Effect of AT instructions on descriptor handling

Some address translation instructions will stop translation after
the 1st stage and intercept the IPA, even in the presence of
stage 2 (eg AT S1E1).  However, in the case of a TLB miss, the
table descriptors still need to be translated from IPA to PA to
avoid fetching the wrong addresses.  This commit splits whether
IPA->PA translation is required for the VA and/or for the table
descriptors.

Change-Id: Ie53cdc00585f116150256f1d833460931b3bfb7d
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13781
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
src/arch/arm/tlb.cc
src/arch/arm/tlb.hh