projects / nmigen.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: c8c741f) | patch
back.pysim: make `write_vcd(traces=)` actually use those traces.
authorwhitequark <whitequark@whitequark.org>
Thu, 6 Feb 2020 17:07:48 +0000 (17:07 +0000)
committerwhitequark <whitequark@whitequark.org>
Thu, 6 Feb 2020 17:07:48 +0000 (17:07 +0000)
commit0efa3a454142784404fc34be50dbd58ac116a323
treedba0d1caac85744be8510bf7dc3eee180b655ba4tree
parentc8c741f7e4f9b66bcb6d613f8c90be814dd21c3dcommit | diff
back.pysim: make `write_vcd(traces=)` actually use those traces.

Reported in #280.
nmigen/back/pysim.py diff | blob | history