i965/fs: use the NIR bit size when creating registers
authorConnor Abbott <connor.w.abbott@intel.com>
Wed, 29 Jul 2015 21:16:51 +0000 (14:16 -0700)
committerSamuel Iglesias Gonsálvez <siglesias@igalia.com>
Tue, 10 May 2016 09:25:04 +0000 (11:25 +0200)
commit0f1690fd9514f7a282141a7ad57a06b334b6c1a4
treef4cb19a1afaae4719114eb817360394d66eaed53
parent76de7af8e22c7f7b174bca765f9f86a5beef963c
i965/fs: use the NIR bit size when creating registers

v2 (Iago):
  - Squashed bits from 'support double precission constant operands for
    the implementation of 64-bit emit_load_const'.
  - Do not use BRW_REGISTER_TYPE_D for all 32-bit registers since that breaks
    asserts and functionality for some piglit tests. Just keep 32-bit types
    untouched and add 64-bit support.
  - Use DF instead of Q for 64-bit registers. Otherwise the code we generate
    will use Q sometimes and DF others and we hit unwanted DF/Q conversions,
    so always use DF.

v3 (Sam):
  - Mark 'reg_type' occurrences as const (Topi).

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Signed-off-by: Tapani Palli <tapani.palli@intel.com>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Signed-off-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_fs_nir.cpp