mem: Add a memory delay simulator
authorAndreas Sandberg <andreas.sandberg@arm.com>
Wed, 2 May 2018 12:55:10 +0000 (13:55 +0100)
committerAndreas Sandberg <andreas.sandberg@arm.com>
Thu, 28 Jun 2018 16:12:53 +0000 (16:12 +0000)
commit0f33b2c1d5875aae036a9e2779f6e9c764e0f85e
tree659285bb368acc6b5f93ef4ac52b1d3678a1a211
parentf6dd997ef43f52f80f5cdb43cd32614ce4169960
mem: Add a memory delay simulator

Add a memory system component that delays traffic. The base
functionality to delay packets is implemented in the abstract MemDelay
class. This class exposes three methods that control packet delays:

  * delayReq(pkt)
  * delayResp(pkt)
  * delaySnoopResp(pkt)

These methods should be specialized to implement delays for specific
packet types.

The class SimpleMemDelay uses the MemDelay base class to implement
constant delays for read/write requests and responses.

The intention is that these classes can be used for rapid prototyping
of components that add a small fixed delay and the same throughput as
the interconnect. I.e., any buffering done in the base class will be
small and proportional to the introduced delay.

Change-Id: I158cb85f20e32bfdbcbfed66a785b4b2dd47b628
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nicholas Lindsey <nicholas.lindsay@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11521
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
src/mem/MemDelay.py [new file with mode: 0644]
src/mem/SConscript
src/mem/mem_delay.cc [new file with mode: 0644]
src/mem/mem_delay.hh [new file with mode: 0644]