x86: process instruction operands for .insn
authorJan Beulich <jbeulich@suse.com>
Fri, 31 Mar 2023 06:21:05 +0000 (08:21 +0200)
committerJan Beulich <jbeulich@suse.com>
Fri, 31 Mar 2023 06:21:05 +0000 (08:21 +0200)
commit0ff3b7d0c70274a916c21eb8fb5e040ee17af9f8
treed95febde6ae5fe425f1080438b9525504722549d
parent393fbe8d81ed4e26c66493bba5ac98b0bdae5f27
x86: process instruction operands for .insn

Deal with register and memory operands; immediate operands will follow
later, as will the handling of EVEX embedded broadcast and EVEX Disp8
scaling.

Note that because we can't really know how to encode their use, %cr8 and
up cannot be used with .insn outside of 64-bit mode. Users would need to
specify an explicit LOCK prefix in combination with %cr0 etc.
gas/config/tc-i386-intel.c
gas/config/tc-i386.c
gas/testsuite/gas/i386/insn-32.d
gas/testsuite/gas/i386/insn-32.s
gas/testsuite/gas/i386/insn-64.d
gas/testsuite/gas/i386/insn-64.s