cpu: add buses list and use it in soc_core to add bus masters
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Thu, 10 Oct 2019 19:35:06 +0000 (21:35 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Thu, 10 Oct 2019 19:35:06 +0000 (21:35 +0200)
commit1045cda39e63b3bfcf1d24d26dbc15837e25d9e3
treed978216d4a7a5b6b6900afe844dc79d30e35af5e
parent42ccc91f749d95abce1a8d5f11e97c30f3d36543
cpu: add buses list and use it in soc_core to add bus masters
litex/soc/cores/cpu/minerva/core.py
litex/soc/cores/cpu/mor1kx/core.py
litex/soc/cores/cpu/picorv32/core.py
litex/soc/cores/cpu/rocket/core.py
litex/soc/cores/cpu/vexriscv/core.py
litex/soc/integration/soc_core.py