[AArch64] Add combine pattern to fuse AESE/AESMC instructions
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Mon, 14 May 2018 16:29:13 +0000 (16:29 +0000)
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>
Mon, 14 May 2018 16:29:13 +0000 (16:29 +0000)
commit10c54e5b0e098b5b1e7a0b79716bc113fe96c45e
treeeca5aa957a2478f1838484727fc83df4398d9efb
parent43d0a8ee88460a1161264c0c1a68e063493c3f20
[AArch64] Add combine pattern to fuse AESE/AESMC instructions

When the AESE,AESD and AESMC, AESMC instructions are generated through the appropriate arm_neon.h intrinsics
we really want to keep them together when the AESE feeds into an AESMC and fusion is supported by the target CPU.
We have macro-fusion hooks and scheduling model forwarding paths defined to facilitate that.
It is, however, not always enough.

This patch adds another mechanism for doing that.
When we can detect during combine that the required dependency is exists (AESE -> AESMC, AESD -> AESIMC)
just keep them together with a combine pattern throughout the rest of compilation.
We won't ever want to split them.

The testcases generate 4 AESE(D) instructions in a block followed by 4 AES(I)MC instructions that
consume the corresponding results and it also adds a bunch of computations in-between so that the
AESE and AESMC instructions are not trivially back-to-back, thus exercising the compiler's ability
to bring them together.

With this patch all 4 pairs are fused whereas before a couple of fusions would be missed due to intervening
arithmetic and memory instructions.

* config/aarch64/aarch64-simd.md (*aarch64_crypto_aese_fused):
New pattern.
(aarch64_crypto_aesd_fused): Likewise.

* gcc.target/aarch64/crypto-fuse-1.c: New test.
* gcc.target/aarch64/crypto-fuse-2.c: Likewise.

From-SVN: r260234
gcc/ChangeLog
gcc/config/aarch64/aarch64-simd.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/aarch64/crypto-fuse-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/aarch64/crypto-fuse-2.c [new file with mode: 0644]