Add and use plle2 primitive for nexys boards
authorOlof Kindgren <olof.kindgren@gmail.com>
Sat, 24 Aug 2019 09:25:21 +0000 (11:25 +0200)
committerOlof Kindgren <olof.kindgren@gmail.com>
Mon, 26 Aug 2019 11:44:50 +0000 (13:44 +0200)
commit12327034d6308c8ddc2397387e5cfa610e422b55
tree94ce075ebd4274dd84a2f691ab8200bf2a2f28cf
parent8bc3e8ea0ad3e62c05c1a4a16c0e0b63ee54f8cc
Add and use plle2 primitive for nexys boards
fpga/clk_gen_plle2.vhd [new file with mode: 0644]
microwatt.core