arch-riscv: Move compressed ops out of ISA
authorAlec Roelke <ar4jc@virginia.edu>
Fri, 10 Nov 2017 20:46:11 +0000 (15:46 -0500)
committerAlec Roelke <ar4jc@virginia.edu>
Thu, 7 Dec 2017 03:14:09 +0000 (03:14 +0000)
commit12e646ee724ae2bb8c75ed6b385f161de361acd3
treecb406b863f562f64d952be4f1b1f5177053471ab
parent7f163ca6d997fd7b8b51f640d450589dff0de78f
arch-riscv: Move compressed ops out of ISA

This patch moves static portions of the compressed instruction
definitions out of the ISA generated code.

Change-Id: I61daae8b8c03a9e0f012790a132aa4d34a6ec296
Reviewed-on: https://gem5-review.googlesource.com/6026
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Alec Roelke <ar4jc@virginia.edu>
src/arch/riscv/insts/SConscript
src/arch/riscv/insts/compressed.cc [new file with mode: 0644]
src/arch/riscv/insts/compressed.hh [new file with mode: 0644]
src/arch/riscv/isa/formats/compressed.isa
src/arch/riscv/isa/includes.isa