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(parent: 7661f1c) | patch
scons: Enable -Wextra by default
authorAndreas Hansson <andreas.hansson@arm.com>
Mon, 11 Jan 2016 10:52:20 +0000 (05:52 -0500)
committerAndreas Hansson <andreas.hansson@arm.com>
Mon, 11 Jan 2016 10:52:20 +0000 (05:52 -0500)
commit12eb0343784f52994110df7e7fce4a0b639a6ec3
tree12ff1c51b8051bb7e7d889eed499bee0dcd4cd1etree
parent7661f1c2bf2b45603264076fabce2eb42373cd18commit | diff
scons: Enable -Wextra by default

Make best use of the compiler, and enable -Wextra as well as
-Wall. There are a few issues that had to be resolved, but they are
all trivial.
33 files changed:
SConstruct diff | blob | history
ext/dramsim2/SConscript diff | blob | history
ext/libelf/SConscript diff | blob | history
ext/nomali/SConscript diff | blob | history
src/SConscript diff | blob | history
src/arch/alpha/faults.hh diff | blob | history
src/arch/alpha/utility.hh diff | blob | history
src/arch/arm/faults.hh diff | blob | history
src/arch/arm/utility.cc diff | blob | history
src/arch/mips/faults.hh diff | blob | history
src/arch/mips/isa/decoder.isa diff | blob | history
src/arch/sparc/isa/decoder.isa diff | blob | history
src/base/bitunion.hh diff | blob | history
src/cpu/base_dyn_inst.hh diff | blob | history
src/cpu/pred/sat_counter.hh diff | blob | history
src/cpu/trace/trace_cpu.cc diff | blob | history
src/dev/arm/hdlcd.hh diff | blob | history
src/dev/arm/pl011.hh diff | blob | history
src/dev/net/ethertap.cc diff | blob | history
src/dev/net/ns_gige_reg.h diff | blob | history
src/dev/net/pktfifo.hh diff | blob | history
src/dev/sparc/iob.cc diff | blob | history
src/dev/terminal.cc diff | blob | history
src/mem/packet.hh diff | blob | history
src/mem/page_table.hh diff | blob | history
src/mem/request.hh diff | blob | history
src/mem/ruby/slicc_interface/AbstractController.hh diff | blob | history
src/mem/ruby/slicc_interface/Message.hh diff | blob | history
src/mem/ruby/structures/RubyMemoryControl.cc diff | blob | history
src/mem/ruby/structures/RubyMemoryControl.hh diff | blob | history
src/mem/ruby/system/RubySystem.hh diff | blob | history
src/sim/process.cc diff | blob | history
src/sim/sim_events.hh diff | blob | history