pp_soc_uart: Fix rx synchronizers and ensure stable tx init state
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Thu, 14 May 2020 04:26:14 +0000 (14:26 +1000)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Fri, 15 May 2020 10:49:09 +0000 (20:49 +1000)
commit13e84b0bbb7a0ce2bd935bf3c36e601f85c6f8b0
tree25c64d6bd035bca698380d23115c017aabd7cdfa
parentbd42580a4217b6a66e0842d370f57b5022e6f9f1
pp_soc_uart: Fix rx synchronizers and ensure stable tx init state

The rx synchronizers were ... non existent. Someone forgot to add
a if rising_edge(clk) to the process.

For tx, ensure that we have a default value so that TX stays high
from TPGA configuration to the reset being sampled on the first clock
cycle.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
fpga/pp_soc_uart.vhd