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(parent: 410f250) | patch
targets: add simple design (vendor agnostic and usable on all platforms with UART...
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Sat, 20 Sep 2014 20:48:53 +0000 (22:48 +0200)
committerSebastien Bourdeauducq <sb@m-labs.hk>
Fri, 26 Sep 2014 02:35:15 +0000 (10:35 +0800)
commit13fb9282db0f67ab296dd6be9d51236c51e9b457
tree6c0edfaa02f6cb17a93571915a8ece552eef3c7btree
parent410f250d2ad4189fb71a894f238e06bdf71e7a64commit | diff
targets: add simple design (vendor agnostic and usable on all platforms with UART pins).

Designing a SoC with Migen is easy, but we have to provide a very simple design that can
be used on all boards with only 1 clock and 2 UARTs pins defined. This will encourage the
newcomer to invest time in Migen/MiSoC and see its real potential.
targets/simple.py [new file with mode: 0644] blob