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(parent: 5b6f707) | patch
Implement X86 sse2 movdqu and movdqa instructions
authorVince Weaver <vince@csl.cornell.edu>
Wed, 21 Oct 2009 17:40:43 +0000 (13:40 -0400)
committerVince Weaver <vince@csl.cornell.edu>
Wed, 21 Oct 2009 17:40:43 +0000 (13:40 -0400)
commit14691148cd9300ed7a23dd889b9c0173124b30eb
tree4c73311d2302e94b9aed67ae70d36e184614b45btree
parent5b6f707a008b4312fd02a4383bf107adfa677d33commit | diff
Implement X86 sse2 movdqu and movdqa instructions

The movdqa instruction should enforce 16-byte alignment.
This implementation does not do that.

These instructions are needed for most of x86_64 spec2k to run.
src/arch/x86/isa/decoder/two_byte_opcodes.isa diff | blob | history
src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py diff | blob | history