Add variable length support to xilinx_srl
authorEddie Hung <eddie@fpgeh.com>
Thu, 22 Aug 2019 00:34:40 +0000 (17:34 -0700)
committerEddie Hung <eddie@fpgeh.com>
Thu, 22 Aug 2019 00:34:40 +0000 (17:34 -0700)
commit15188033da68c89c409af0839f22e6acc573abb7
tree26cd2808fbcedddf0d86d071edcb17de432c6a7c
parent6d76ae4c65d3a7b403888219900a3c0f85ee737d
Add variable length support to xilinx_srl
passes/pmgen/xilinx_srl.cc
passes/pmgen/xilinx_srl.pmg
techlibs/xilinx/synth_xilinx.cc