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(parent: c344c92) | patch
intel/ir: Represent logical edge of BREAK instruction.
authorFrancisco Jerez <currojerez@riseup.net>
Tue, 6 Aug 2019 01:21:05 +0000 (18:21 -0700)
committerFrancisco Jerez <currojerez@riseup.net>
Fri, 11 Oct 2019 19:24:16 +0000 (12:24 -0700)
commit152754665abb937a49e451331c88266ef5c3cdf1
treee3c73025b48a4026eabc6a581cbea08ea2b10141tree
parentc344c92b31454115261d6f235d00e4e14ed0ce3ccommit | diff
intel/ir: Represent logical edge of BREAK instruction.

Currently only the physical back-edge is represented, which
incidentally also leads to the exit block of the loop, but we need the
direct logical edge in addition for our logical CFG representation to
be complete.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
src/intel/compiler/brw_cfg.cpp diff | blob | history