Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS)
authorClifford Wolf <clifford@clifford.at>
Sun, 31 Mar 2013 09:19:11 +0000 (11:19 +0200)
committerClifford Wolf <clifford@clifford.at>
Sun, 31 Mar 2013 09:19:11 +0000 (11:19 +0200)
commit161565be104fd0c7b7c4224bd23e9502625e041a
treef0c54a731d73dc7b334579acb56950497a9e1cb6
parent5640b7d6078a681e33e85f06920394204f41c875
Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS)
frontends/ast/ast.cc
frontends/ast/ast.h
frontends/ast/genrtlil.cc
frontends/ast/simplify.cc
frontends/verilog/parser.y