aarch64 - PR target/86887 Fix missing register constraints in carryin patterns
authorRichard Earnshaw <rearnsha@arm.com>
Thu, 9 Aug 2018 13:39:17 +0000 (13:39 +0000)
committerRichard Earnshaw <rearnsha@gcc.gnu.org>
Thu, 9 Aug 2018 13:39:17 +0000 (13:39 +0000)
commit16621f0de36074287eca820cd34de79ab8ee3486
tree22a225d6fa78251c77914063f23d64ce3e255168
parent40c27f7d974e45f49261cb6997df8fae7c88b80f
aarch64 - PR target/86887 Fix missing register constraints in carryin patterns

Some of the carryin insn patterns are missing a register constraint.
That means that the register allocator can pick practically anything
to hold that value, including memory locations, or registers of the
wrong class.

PR target/86887
* config/aarch64/aarch64.md (add<mode>3_carryinC_zero): Add missing
register constraint to operand 0.
(add<mode>3_carryinC): Likewise.
(add<mode>3_carryinV_zero, add<mode>3_carryinV): Likewise.

From-SVN: r263446
gcc/ChangeLog
gcc/config/aarch64/aarch64.md