Add support for mockup clock signals in yosys-smtbmc vcd output
authorClifford Wolf <clifford@clifford.at>
Tue, 20 Feb 2018 16:45:22 +0000 (17:45 +0100)
committerClifford Wolf <clifford@clifford.at>
Tue, 20 Feb 2018 16:45:22 +0000 (17:45 +0100)
commit17583b6a2175bf509d6a233e5684a183af54f48c
tree349aa6e15a76cea692d4c0832f4a7e95ac76baaa
parentf2cfe73d74a5be195ee704c99f472dc454015a66
Add support for mockup clock signals in yosys-smtbmc vcd output

Signed-off-by: Clifford Wolf <clifford@clifford.at>
backends/smt2/smt2.cc
backends/smt2/smtbmc.py
backends/smt2/smtio.py