dev-arm: Fix SGI generation
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 20 Aug 2019 11:26:17 +0000 (12:26 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Fri, 6 Sep 2019 08:32:04 +0000 (08:32 +0000)
commit1768c47bc4fc00e89601ad03c9091c9b949a6c97
tree51950301f0669eaacc2b94a6c5daa084b829d0c7
parentaec83a6451c78f64de5656c2f4075b7453020425
dev-arm: Fix SGI generation

The patch is fixing the following aspects of SGIs

* The conditons over which an SGI can be forwarded to a PE
* SGIs in AArch32 (see below)

It is in fact refactoring SGI generation under a common method in the
cpu interface. It is abandoning the implicit fallthrough mechanism not
only for cosmetic reasons, but also because checking "misc_reg ==" was
only working if the register was an AArch64 one (e.g.
MISCREG_ICC_SGI0R_EL1) and not the AArch32 counterpart (MISCREG_SGI0R).

Change-Id: I6fedfb80388666f4f1d20f6abef378a9f093aa83
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20610
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/dev/arm/gic_v3_cpu_interface.cc
src/dev/arm/gic_v3_cpu_interface.hh
src/dev/arm/gic_v3_redistributor.cc