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intel/fs: Disable SIMD32 dispatch on Gen4-6 with control flow
authorFrancisco Jerez <currojerez@riseup.net>
Tue, 26 Apr 2016 00:29:57 +0000 (17:29 -0700)
committerJason Ekstrand <jason.ekstrand@intel.com>
Thu, 28 Jun 2018 20:19:38 +0000 (13:19 -0700)
commit1811cbdc25371362fcc7ab3dfe49bb020f7cc849
tree5a480a4a4060f17e26c542dc274ca3f73757dce7tree
parentd5b617a28e89fda62fb6cceec10686b0bb4b4fb2commit | diff
intel/fs: Disable SIMD32 dispatch on Gen4-6 with control flow

The hardware's control flow logic is 16-wide so we're out of luck
here.  We could, in theory, support SIMD32 if we know the control-flow
is uniform but we don't have that information at this point.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
src/intel/compiler/brw_fs_nir.cpp diff | blob | history