radeonsi: use TC L2 for CP DMA operations with shader resources on CIK
authorMarek Olšák <marek.olsak@amd.com>
Mon, 29 Dec 2014 13:53:11 +0000 (14:53 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Wed, 7 Jan 2015 11:06:43 +0000 (12:06 +0100)
commit18a30c97780bef9c498db915ba5e7debe832f576
treeb45a733ffe4c56927819e5a7e365e6a9463e54b0
parent11b76369f53e064bef1bad629f957373c0e93b6c
radeonsi: use TC L2 for CP DMA operations with shader resources on CIK

So that TC L2 doesn't need to be flushed.

The only problem is with index buffers, which don't use TC.
A simple solution is added that flushes TC L2 before a draw call (TC_L2_dirty).

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
src/gallium/drivers/radeon/r600_pipe_common.h
src/gallium/drivers/radeonsi/si_descriptors.c
src/gallium/drivers/radeonsi/si_state_draw.c