i965: correct mt->align_h for 2D textures on Skylake
authorNanley Chery <nanley.g.chery@intel.com>
Thu, 18 Jun 2015 18:02:17 +0000 (11:02 -0700)
committerNanley Chery <nanley.g.chery@intel.com>
Wed, 26 Aug 2015 21:36:43 +0000 (14:36 -0700)
commit1a9ceed4ba764cf73a643f8f2135b5b84cfe4581
tree06c96d1497bdd7e3955382ddec8b182d47ea31ae
parent10ff64fd3d19bc9da793fa43eb746c29608bfddd
i965: correct mt->align_h for 2D textures on Skylake

In agreement with commit 4ab8d59a23, vertical alignment values are equal to
four times the block height on Gen9+.

v2: add newlines to separate declarations, statments, and comments.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
src/mesa/drivers/dri/i965/brw_tex_layout.c