i965: Update max VS/PS threads shift offsets for Haswell.
authorKenneth Graunke <kenneth@whitecape.org>
Fri, 23 Sep 2011 00:12:50 +0000 (17:12 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Fri, 30 Mar 2012 21:39:02 +0000 (14:39 -0700)
commit1b3a199097190a0bf857eb17c12949fa2b456d9b
tree593268629f2979aaa7e1f286221457381c11a9d1
parent1ba8c6ad03a3f03ecc6b66e1c0e10a4d6010122f
i965: Update max VS/PS threads shift offsets for Haswell.

These now start at bit 23 instead of bit 24/25.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
src/mesa/drivers/dri/i965/brw_defines.h
src/mesa/drivers/dri/i965/gen7_hiz.c
src/mesa/drivers/dri/i965/gen7_vs_state.c
src/mesa/drivers/dri/i965/gen7_wm_state.c