aarch64: eliminate redundant zero extend after bitwise negation

aarch64: eliminate redundant zero extend after bitwise negation

The attached patch eliminates a redundant zero extend from the AArch64 backend. Given the following C code:

unsigned long long foo(unsigned a)
{
    return ~a;
}

prior to this patch, AArch64 GCC at -O2 generates:

foo:
        mvn     w0, w0
        uxtw    x0, w0
        ret

but the uxtw is redundant, since the mvn clears the upper half of the x0 register. After applying this patch, GCC at -O2 gives:

foo:
        mvn     w0, w0
        ret

Testing:
    Added regression test which passes after applying the change to aarch64.md.
    Full bootstrap and regression on aarch64-linux with no additional failures.

        * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
        * gcc.target/aarch64/mvn_zero_ext.c: New test.