Define YOSYS and SYNTHESIS in preproc
authorClifford Wolf <clifford@clifford.at>
Fri, 2 Jan 2015 16:11:54 +0000 (17:11 +0100)
committerClifford Wolf <clifford@clifford.at>
Fri, 2 Jan 2015 16:11:54 +0000 (17:11 +0100)
commit1bd67d792eefeb7e72bf74f80776b0d5e41d771a
tree06c383bbd0a50e25a57690dca5be4a9b57838687
parent474831643c9e75bd3930f566bc746bb4e330bce9
Define YOSYS and SYNTHESIS in preproc
frontends/verilog/preproc.cc