projects / yosys.git / commit
| author | Eddie Hung <eddieh@ece.ubc.ca> | |
| Sat, 6 Apr 2019 00:35:49 +0000 (17:35 -0700) | ||
| committer | Eddie Hung <eddieh@ece.ubc.ca> | |
| Sat, 6 Apr 2019 00:35:49 +0000 (17:35 -0700) | ||
| commit | 1d526b7f061fb7e7961fa4d0b318b27cfda469d4 | |
| tree | cbe59fad8080ffbeae3a15ee19f95b8900da9e35 | tree |
| parent | 4afcad70e264d58bcbb8cddcffd19673c3570fc6 | commit | diff |
| passes/techmap/shregmap.cc | diff | blob | history | |
| techlibs/xilinx/cells_map.v | diff | blob | history | |
| techlibs/xilinx/synth_xilinx.cc | diff | blob | history |