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(parent: c97b080) | patch
Rework wishbone slave address decoding
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Tue, 10 Sep 2019 13:52:23 +0000 (14:52 +0100)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Tue, 10 Sep 2019 15:50:49 +0000 (16:50 +0100)
commit1d66e1f981b4447f58e4506718740b1219d96644
tree20f120ddc0044b157c2504d20f86eb1872ce623ctree
parentc97b080d8c32e6d147553ee18e10fab397d39b3ccommit | diff
Rework wishbone slave address decoding

Don't make it synchronous, no latches

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
fpga/soc.vhdl diff | blob | history