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(parent: c21a2a5) | patch
arch-arm: Add ARMv8.1 TTBR1_EL2 register
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 17 Apr 2018 10:08:29 +0000 (11:08 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Thu, 19 Apr 2018 11:59:25 +0000 (11:59 +0000)
commit1de574fcbdf009eacda9eae1b239e7c367e2cb79
treea968701ca53eb7c987fd41ae53a2cc9fe125c9f2tree
parentc21a2a54ca366c2e699571b1dddd083a77601831commit | diff
arch-arm: Add ARMv8.1 TTBR1_EL2 register

This patch adds ARMv8.1 TTBR1_EL2 register into the decodeAArch64SysReg
table, but stil leaving it unimplemented (Accessing it through MSR/MRS
causes an exception)

Change-Id: I463b86cc544233aa1ee5b2fcba689d6b9f2a874b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10063
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
src/arch/arm/isa.cc diff | blob | history
src/arch/arm/miscregs.cc diff | blob | history
src/arch/arm/miscregs.hh diff | blob | history