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(parent: fcd6583) | patch
fhdl: do not attempt slicing non-array signals to keep Verilog happy
authorSebastien Bourdeauducq <sebastien@milkymist.org>
Mon, 6 Feb 2012 17:07:02 +0000 (18:07 +0100)
committerSebastien Bourdeauducq <sebastien@milkymist.org>
Mon, 6 Feb 2012 17:07:02 +0000 (18:07 +0100)
commit1eb348c573dfb68c67ed09445e5fdb5f524ac8b6
tree89d914029e9cd48c283ee0b22422f84556e6dc08tree
parentfcd6583cbbcc366c16e9bc1038dc305aaf323c75commit | diff
fhdl: do not attempt slicing non-array signals to keep Verilog happy
migen/fhdl/verilog.py diff | blob | history