arch-arm: LDTRSW was not marked as unpriviledged
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Wed, 4 Dec 2019 14:16:47 +0000 (14:16 +0000)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Mon, 10 Feb 2020 09:41:11 +0000 (09:41 +0000)
commit20ed09d1a1013f0656684173ff65ba8f85c9555c
tree4219354a6087c3d99df907722c7da8de16394894
parent6a4d111855318a054da9525948879e8081e76cc1
arch-arm: LDTRSW was not marked as unpriviledged

Change-Id: If0f2b835e40ef011eba884b1dcd81f14531fd1ce
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24043
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
src/arch/arm/isa/insts/ldr64.isa