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(parent: 9764dfc) | patch
Implement a debug port on the pseudo 1W/1R SRAM
authorCesar Strauss <cestrauss@gmail.com>
Sun, 3 Apr 2022 18:50:43 +0000 (15:50 -0300)
committerCesar Strauss <cestrauss@gmail.com>
Sun, 3 Apr 2022 18:50:43 +0000 (15:50 -0300)
commit21135f80de4667546c953a562ca91fa20fecf50b
treead78fa7ef66fc4ec254926eedd1a4e8f18e20a8atree
parent9764dfc9c5d0fc8dff70c73cc4475d1087b155aacommit | diff
Implement a debug port on the pseudo 1W/1R SRAM

Exposes the debug ports of the underlying memories.
This is needed to assist the induction proof.
src/soc/regfile/sram_wrapper.py diff | blob | history